A digital radiography imaging panel acquires image data from a scintillating medium using an array of individual sensors, arranged in a row-by-column matrix so that each sensor provides a single pixel of image data.
For these devices, hydrogenated amorphous silicon (a-Si:H) is commonly used to form the photodiode and the thin-film transistor (TFT) switch. FIG. 1A shows a cross-section (not to scale) of a single imaging pixel 10 in a prior art a-Si:H based flat panel imager. Each imaging pixel 10 has, as shown in FIG. 1B, a photodiode 70 and a TFT switch 71.
A layer of X-ray converter material (e.g., luminescent phosphor screen 12), shown in FIG. 1, is coupled to the photodiode-TFT array. Photodiode 70 comprises the following layers: a passivation layer 14, an indium tin oxide layer 16, a p-doped Si layer 18, an intrinsic a-Si:H layer 20, an n-doped Si layer 22, a metal layer 24, a dielectric layer 26, and glass substrate 28. X-ray photon path 30 and visible light photon path 32 are also shown in FIG. 1A. When a single X-ray is absorbed by the phosphor, a large number of light photons are emitted isotropically. Only a fraction of the emitted light reaches the photodiode and gets detected.
FIG. 1B shows a block diagram of the flat panel imager 80. Flat panel imager 80 consists of a sensor array 81 comprising a matrix of a-Si:H n-i-p photodiodes 70 and TFTs 71, with gate driver chips 82 connected to the blocks of gate lines 83 and readout chips (not shown) connected to blocks of data lines 84 and bias lines 85, having charge amplifiers 86, optional double correlated sampling circuits with programmable filtering (not shown) to help reduce noise, analog multiplexer 87, and analog-to-digital converter (ADC) 88, to stream out the digital image data at desired rates. The operation of the a-Si:H-based indirect flat panel imager is known by those skilled in the art, and thus only a brief description is given here.
Incident X-ray photons are converted to optical photons in the phosphor screen 12, and these optical photons are subsequently converted to electron-hole pairs within the a-Si:H n-i-p photodiodes 70. In general, a reverse bias voltage is applied to bias lines 85 to create an electric field (and hence a depletion region) across the photodiodes and enhance charge collection efficiency. The pixel charge capacity of the photodiodes is determined by the product of the bias voltage and the photodiode capacitance. The image signal is integrated by the photodiodes while the associated TFTs 71 are held in a non-conducting (“off”) state. This is accomplished by maintaining gate lines 83 at a negative voltage. The array is read out by sequentially switching rows of TFTs 71 to a conducting state by means of TFT gate control circuitry. When a row of pixels is switched to a conducting (“on”) state by applying a positive voltage to corresponding gate line 83, charge from those pixels is transferred along data lines 84 and integrated by external charge-sensitive amplifiers 86. The row is then switched back to a non-conducting state, and the process is repeated for each row until the entire array has been read out. The signal outputs from external charge-sensitive amplifiers 86 are transferred to analog-to-digital converter (ADC) 88 by parallel-to-serial multiplexer 87, subsequently yielding a digital image. The flat panel imager is capable of both single-shot (radiographic) and continuous (fluoroscopic) image acquisition.
Because of the scale of sensor devices and the proximity of data lines to other electrodes and conductive components, the problem of capacitive coupling is a particular concern with digital radiology sensors. Unless some corrective action is taken, capacitive coupling can degrade functions of the sensing array for both signal measurement and data accuracy. There have been a number of proposed solutions in response to this problem. For example, U.S. Pat. No. 5,770,871 (Weisfield) describes the use of an insulating anti-coupling layer interposed between charge collection electrodes and data lines. Similarly, U.S. Pat. No. 6,858,868 (Nagata et al.) describes an interlayer insulating film provided between data and analog signal electrodes. U.S. Pat. No. 6,124,606 (den Boer et al.) describes the use of an insulating layer having a low dielectric constant for reducing parasitic capacitance where collector electrodes overlap switching devices. U.S. Pat. No. 6,734,414 (Street) describes a method for reduced signal coupling by a particular routing pattern for readout control signal lines for columns of pixels.
For many types of conventional sensing devices, the photosensor device itself, typically a photodiode or PIN diode, only occupies a portion of the surface area. Switching devices used to switch the photosensor component to a read-out device take up a sizeable portion of the area of each pixel. As a result, the sensor device suffers from relatively poor fill-factor and is able to use only a fractional portion of the light emitted from the phosphor screen. As one example, U.S. Pat. No. 5,516,712 (Wei et al.) describes a pixel with side-by-side photosensor and switching thin-film transistor (TFT) elements. More recently, designs using photosensors stacked atop their switching components have been employed, providing some measure of improved efficiency. For example, U.S. Pat. No. 6,707,066 (Morishita) describes a photodetection apparatus having photodiodes positioned atop switching TFT devices, thus closer to scintillation material in the imaging device. U.S. Pat. No. 5,619,033 (Weisfield) describes a stacked arrangement with the photodiode atop its switching TFT component, relative to the illumination path.
The use of tightly stacked photosensor and TFT components has advantages for increasing the effective fill factor of the sensing array. However, with more compact packaging comes the complication of increased signal coupling between data and switching electrodes and increased thermal or “dark state” noise due to Johnson noise effects. The capacitive coupling problem becomes even more acute when the imaging array is formed on a conductive stainless steel substrate. Stainless steel and similar metals have characteristics such as good flexibility and are relatively robust and lightweight. The use of a stainless steel substrate allows manufacture of a thin imaging plate for radiographic imaging. However, capacitive coupling effects can compromise the overall performance of a plate formed on a stainless steel substrate.
One way to reduce thermal noise is to increase the conductivity of data traces, thereby reducing resistance. This can be effected by increasing conductor thickness and by a suitable choice of conductive material. The conductive materials that are conventionally used for making connections to array sensing electronics are not ideal conductors and must be selected from among a somewhat limited group of materials. Typically, for example, chromium is used for connection to doped silicon components. Aluminum, although a better conductor, exhibits a tendency to diffuse into silicon and to form hillock- and whisker-type defects at high temperatures, rendering it an unsuitable alternative for many semiconductor designs.
Techniques for reducing capacitive coupling effects include increasing the separation distance between conductive surfaces and decreasing the effective dielectric constant of the insulation between switching and signal electrodes. However, current fabrication techniques typically form these metal electrode structures on the backplane with a thin a-SiN:H dielectric separation layer that is typically only a few hundred nanometers thick, resulting in generally higher coupling, higher crosstalk levels. This could also result in increasing the likelihood of interlayer shorts manufacturing defects.
Thus, what is needed is an apparatus that provides both high fill factor for improved efficiency and, at the same time, reduces capacitive coupling and crosstalk between control and signal lines in the array device.